Press Kit Tipsheet for 2000 IEDM

The papers presented at the IEEE International Electron Devices Meeting (IEDM) each year represent the best applied research in electronics. As such, IEDM papers give important clues about where electronics technology will be three-to-five years from now.

Here are some of the expected technology highlights of the 46th annual IEDM, to be held December 11- 13, 2000 at the San Francisco, CA Hilton and Towers. In most places we have described physical dimensions in nanometers (nm), in keeping with the semiconductor industry's move in that direction. To convert from nanometers to the more familiar microns (µm), simply move the decimal point three places to the left.

Some of the most interesting work in the physical and life sciences is being done on the nano-scale, which applies to the Lilliputian worlds where microscopic mechanical structures, molecules, living cells, and atoms and atomic particles like electrons loom large. IEDM has always been at the forefront of nanotechnology as applied to electronics, because the industry's goal is to make a chip with more transistors (e.g. to increase density) so it can replace multiple older chips and other components in electronic systems. Making transistors smaller is the main reason electronics-based gear continually becomes more powerful, energy-efficient, smaller, lighter and less costly. For example, Intel Corporation's first general-purpose microprocessor chip (the 4004, introduced in 1970) had 2,300 transistors; its first Pentium® microprocessor (1993) had 3.1 million; its first Pentium® II (1997) had 7.5 million; and its first Pentium® III (1999) had 28 million.

• One-Electron Arithmetic: Transistors that switch on and off based on a single electron's movement are desirable because they are small and their power use would be ultra-low, meaning that chips containing hundreds of millions of them could be powered by small batteries. With them, for instance, a hand-size supercomputer could be built. While some single-electron transistors have been demonstrated, none have actually performed a complete computation. 

• An Aerosol Of Floating Nanocrystals: Data is stored as patterns of electrical charge on memory chips. Some memories lose that data as the charges dissipate when the power is turned off, but that's not the case with so-called non-volatile memories like "flash" memory. Flash, which stores charge indefinitely on capacitors, is popular because of its good access speeds, durability, low power consumption and economy. However, a team from Lucent Technologies has built a novel non-volatile memory device that uses a floating gate containing nanocrystals which hold the charge, rather than a capacitor. An aerosol-based technique was used to deposit and integrate a thin, dense, uniform layer of nanocrystals in the gate dielectric of 200nm MOSFET transistors. The spherical nanocrystals were made from diluted silane cooked at 950ºC, and were as small as 3nm in diameter. The technology may overtake flash memory one day because it is simpler to make, lower-cost, has excellent durability through more than 100,000 read/write cycles, and operates at lower voltages. (Paper #29.7, "A Novel, Aerosol-Nanocrystal Floating-Gate Device for Non-Volatile Memory Applications," J. DeBlauwe et al, Lucent Technologies)
• Laboratory On A Chip: The continued downward scaling of semiconductor feature sizes is beginning to make it possible to build entire circuits whose size is comparable to that of microorganisms like cells, bacteria and, in the near future, viruses. Such tiny circuits can be used to build miniaturized biological instruments where, for example, a drop of liquid is placed not on a glass slide but instead on a silicon chip for analysis by the chip's circuits. A team from the University of Bologna in Italy will describe a way in which an electronic system - using the dipole moment of a cell (its polarity) - can cause the cell to move toward a sensor on the chip. At IEDM, they will show a movie illustrating this displacement of microorganisms. (Paper #17.5, "CMOS-Compatible Sensors and Manipulators for Microorganisms," G. Medoro et al, University of Bologna.
• Smallest Gate: A gate is a key transistor component. As a transistor is made smaller (as it "scales"), current leaking through ultra-thin insulators known as gate oxides becomes a major problem.

Speed is the name of the game when it comes to data communications, where digital transistor technologies are being pushed to the limit to develop future 40Gb/sec fiber-optic data communications systems. (It's true that light carries digital information through optical fiber, but electronic systems are needed at each end of the line to encode/decode and transmit/receive the information. The major problem in making fiber-optic systems faster is that no matter how fast the electronics are at each end, they're always playing catch-up to the speed of light.) High-speed devices are also essential for wireless communications and for other types of ultra-high-speed electronic systems.

• How Do We Get There? An evening panel session on Tuesday, December 12, will address many technological challenges that must be surmounted to build future 40Gb/second data communications systems. Moderated by Mark Rodwell of University of California at Santa Barbara, the panel will explore such questions as: What technologies (device, interconnect, packaging, etc.) will be needed to get to those speeds? Can standard CMOS processes do it, or will we need silicon germanium, or something else? What comes after dense wavelength division multiplexing (DWDM)? What are the technology tradeoffs for 80, 160 and higher Gb/second rates? Can electronics do it, or will the systems have to be all-optical?
• Fastest Silicon Transistor: Hitachi researchers built the fastest silicon-based bipolar transistor ever, operating at 180 GHz with an ECL gate-delay of 6.7 ps. It is suitable for use in 10 Gb/second fiber-optic systems, but because it is compatible with standard CMOS architectures and also incorporates passive devices (a capacitor and a high-Q inductor), it also is applicable to microwave/millimeter-wave wireless communications systems. The self-aligned 200nm transistor was built using a silicon-germanium process (SiGe) and it represents the first time passives have been incorporated successfully in this high-resistance material. (Paper #32.2, "A 0.2µm 180-GHz-fmax 6.7ps SOI/HRS Self-Aligned SEG SiGe HBT/CMOS Technology for Microwave and High-Speed Digital Applications," K. Washio et al, Hitachi)
• Fastest Heterojunction: Transistors are built from layers of complementary materials with different electrical characteristics. These materials usually are silicon and silicon dioxide, because they have atomic structures that are well-matched and it is easy to make transistors out of them. But electrons can travel faster through structures made from certain combinations of materials from columns III and V of chemistry's periodic table of elements. That's why transistors made from them operate faster. The problem is, the atomic structures of different III-V materials aren't usually well-matched, and so it's tricky to make good, working heterojunctions with them. Heterojunctions are transistor structures where the different III-V materials must come into contact.

• Fast, Powerful Amplifier I: When a cell phone is used, what it is actually communicating with is the nearest base station on its network. The base station amplifies the phone's signal at high speed and then transmits it wherever it needs to go to handle the call. This high-speed amplification requires chips that are not only fast but which can handle high power levels. Cree Lighting will describe a one-chip amplifier they made that operated at 6 GHz with an output power of 51W at 39V. It featured a record power density of 6.4W/mm across the entire surface of the chip, which is 10 times greater than today's normal levels and the highest ever reported. The chip, a so-called HEMT design, was made from an alloy of AlGaN/GaN on a SiC substrate. (Paper #16.1,"A 50-W AlGaN/GaN HEMT Amplifier," Y.-F. Wu et al, Cree Lighting)
• Fast, Powerful Amplifier II: Radar, radio astronomy, atmospheric sensing, all-weather imagers, military communications systems and other ultra-high-speed applications require high-frequency, high-bandwidth components. Until now, there haven't been components operating at G-band frequencies (140 - 220 GHz) which would make possible new, more powerful generations of such equipment. A paper from TRW, however, will describe a monolithic microwave IC (MMIC) one-chip amplifier that produced 15 dB of gain at 215 GHz. This is the highest gain ever achieved at the highest frequency for a three-terminal amplifier. The chip is based on TRW's indium phosphide (InP) HEMT MMIC process. (Paper #8.1, "InP HEMT Amplifier Development for G-Band (140-220 GHz Applications," R. Lai et al, TRW)
• Clock Radio: All of the circuit elements on a chip must be synchronized to its clock frequency, otherwise the chip won't work correctly. Right now the clock frequency is carried across the chip by wires, or interconnect. But as chips get faster, denser and somewhat larger in area, it may not be possible to distribute the clock frequency (and other necessary signals) across the entire area of the chip in time by wire. An IEDM paper by University of Florida researchers investigates whether it is feasible to use tiny microwave radio transmitters and antennas to broadcast them across the chip instead. While the transmitter may be located on or off the chip, the antennas must be on-chip. The paper describes a variety of antennas of different shapes made from 200nm-thick aluminum. The work suggests that even though a chip's existing metal structures interfere with reception, radio broadcasting nevertheless may be feasible within an area having a radius of 2cm. (Paper #20.3, "On-Chip Wireless Interconnection With Integrated Antennas," K. Kim et al, University of Florida)
• Integrating CMOS RF & Logic: CMOS, or complementary metal oxide semiconductor, is the name of the architecture that applies to most silicon chips. Right now, cell phone circuitry consists of three basic elements: a CMOS logic chip that is the "brains" of the phone and also controls the user interface; a flash memory chip for data storage; and a high-speed radio-frequency (RF) chip to transmit the signal. If all of these could be integrated on one chip, cell phones could be made even smaller and use less power, and new types of mobile computing devices would become possible. A key challenge in integrating the logic and RF circuitry, though, is that the RF chip is normally made from a III-V material like gallium arsenide (GaAs) which employs transistors of the bipolar type, while transistors in the CMOS logic chip are MOSFETs. The two are incompatible.

There is a continuing need for more semiconductor-based memory in electronics, and the 2000 IEDM has many papers describing noteworthy memory developments. DRAMs (dynamic random access memories) are the workhorse memory chips used in virtually all electronic equipment. They consist of an array of memory cells. The more cells there are, the more data the DRAM can hold, so making each cell smaller is the key challenge in memory technology. Each cell has a capacitor to store electrical charge and a transistor to charge/discharge the capacitor. A "0" or "1" is represented by either the presence or absence of the charge. Manipulation of these digits is the basis of computing. Currently 256 Mb DRAM chips are available, with 1 Gb densities expected to appear in commercial volumes in 2002, and 4 Gb densities in 2005.

DRAMs lose their data when their power is turned off, but non-volatile types like flash memory and E²PROM don't. The catch with non-volatile memories is that they aren't as dense as DRAMs, and some types require higher supply voltages as well.

• Vertical Access Revisited: At last year's IEDM, IBM announced a novel deep-trench capacitor DRAM cell using a vertical access transistor along the trench sidewall. It allowed the transistor's gate length to be relatively long (vertically) while still enabling very high levels of chip density (horizontally). This year, IBM will describe a 6F² trench-capacitor DRAM based on a trench-sidewall vertical-channel array transistor. It is likely to be a key enabling technology for IBM's 4 Gb and even 16 Gb DRAMs. ("6F²" is a measure of the memory cell's size. When a cell is no larger than 6 times the square of the size of its smallest feature, it is suitable for use in very dense memory chips.) (Paper #15.1, "An Orthogonal 6F² Trench-Sidewall Vertical Devices Cell for 4Gb/16Gb DRAM," C. Radens et al, IBM)
• 1 Gb Flash: Samsung researchers built the first prototype 1 Gb flash memory, a NAND version with an extremely small cell size of 110nm². It features a high-aspect-ratio floating gate, a tungsten bit line and polysilicon source line. It was built using 150nm design rules and features a dual-damascene interconnect architecture that leads to simpler processing. Such dense nonvolatile memory chips will likely be used to store images from digital still/video cameras, among other applications. (Paper #33.2, "A 0.15µm NAND Flash Technology with 0.11µm² Cell Size for 1Gbit Flash Memory," J. Choi et al, Samsung Electronics)
• 4 Mb FeRAM? Ferroelectric materials have an inherent electrical field that can be polarized using low supply voltages. A ferroelectric capacitor uses polarity to represent the desired "0" or "1" in a memory circuit. The polarization remains until it is reset, even if the power is turned off. Thus, FeRAM is a non-volatile type of memory. Some people think it has the potential to replace flash memory, although it isn't yet competitive. Samsung researchers will describe a highly reliable FeRAM capacitor built from a novel combination of materials. They say it will make possible FeRAM chips with 4 Mb densities. (Paper #34.4, "A Novel Ir/IrO₂/Pt-PZT-Pt/IrO₂/Ir Capacitor for a Highly Reliable Mega-Scale FRAM," D. Jung et al, Samsung Electronics)
• Shared Memory: Modern supercomputers have a parallel-processing architecture, in which the overall problem the computer is trying to solve is broken apart and the pieces are handled simultaneously by multiple processors working in parallel. Many problems can be solved faster and cheaper this way than by using a very fast processor which performs all of the calculations itself. The parallel-processing approach carries with it a problem, though, in that the processors must access and share data in memory yet they all can't do so simultaneously because of bottlenecks on the communications "bus", or data pathway, connecting them to the memory.

A dielectric is an insulator, and a gate dielectric is an essential component of a CMOS transistor. Gate dielectrics for current CMOS transistors are made from silicon dioxide, generally referred to just as oxide. But for future transistors, gate dielectrics will need to be just a few atoms thick and oxide may not work reliably on that scale. Developing tiny gate dielectrics that are highly reliable is the biggest challenge in the continued shrinking of transistors. The strength of an insulator is measured by its dielectric constant or "k". A lower k equates to a better insulator, but reliable materials with a relatively high k are what is needed for future tiny transistors to work properly. Oxide has a dielectric constant of 3.9. Some thin gate dielectrics made from zirconium oxide and hafnium oxide have dielectric constants of about 23, but the search is on for gate dielectrics with better stability.

• A Major Practical Step: IBM researchers will describe how they integrated a gate dielectric made from Al₂O₃ into a conventional CMOS process that uses 80nm polycrystalline silicon gates. (In other words, they not only demonstrated the material's dielectric properties, but they did so at the small feature sizes at which it would be expected to be used.) Al₂O₃ has a good dielectric constant of about 11, is potentially more stable than zirconium oxide or hafnium oxide, and is potentially more compatible with silicon. It had an equivalent oxide thickness of 15 angstroms but featured 100 times less leakage current than an equivalent oxide film would have. IBM's data also suggest the lifetimes of the Al₂O₃ are as good, if not better, than oxide. (Paper #10.1, "80nm Polysilicon-Gated FET with Ultra-Thin Al₂O₃ gate dielectric for ULSI CMOS Applications," D. Buchanan et al, IBM)
• Metal Gates: Many researchers feel the industry will move from polysilicon-based gates to ones made from a metal like tantalum nitride (TaN), which offers good performance. Showcasing the important role universities play in cooperative research, a university/industry-funded University of Texas team built a well-characterized MOSFET with an equivalent oxide thickness of 8 - 12 angstroms using a TaN gate electrode and a hafnium oxide dielectric. (Paper #2.6, "Characteristics of TaN Gate MOSFET with Ultrathin Hafnium Oxide (8A - 12A)," B. Lee et al, Univ. Texas-Austin)
• New High-k Material: Although the search for suitable high-k dielectric materials has focused on amorphous materials like metal oxides and their silicates, a team from IHP in Germany used a crystalline praseodymium oxide film on silicon as the gate dielectric. At an equivalent oxide thickness of only 14 angstroms, the material demonstrated a high dielectric constant of 31. (Paper #28.5, "High-k Dielectrics with Ultra-Low Leakage Current Based on Praseodymium Oxide," H. Osten et al, IHP)

Interconnect is the name given to the metal wiring which connects a chip's transistors and other circuit elements. It is becoming a major impediment to overall chip performance. As transistors have become smaller and more numerous, their interconnect also has had to be made smaller to keep pace, but scaling it down brings a host of problems. The main issues are that thinner interconnect wires, or lines, offer more resistance to the passage of electricity, and that a capacitive coupling effect among closely spaced lines imposes a sort of speed limit on how fast electrons can travel through them. Solutions to these problems include making the interconnect out of lower-resistance copper instead of traditional aluminum, and developing better insulators to isolate the individual lines from each other. In contrast to transistor gate dielectrics, where a higher k-number is desirable, dielectric materials used for interconnect require a low k-number. Air, with a dielectric constant of 1, is considered the perfect insulator.

• Take Your Pick: Motorola researchers have developed a versatile 130nm CMOS architecture they say serves as a good all-round technology platform for advanced chips targeted at a wide variety of applications. Of particular note is its interconnect design, which features up to nine levels of dual- and single-inlaid copper metal with two dielectric options that can be selected to tailor speed and performance as needed. For high-density, low-power applications like mobile ICs with non-volatile memory, an FSG material with a dielectric constant of 3.7 is used. Meanwhile, for GHz-class microprocessors, an unspecified dielectric material with a dielectric constant below 3 is used. The nine-layer process is more costly to manufacture than the more typical six levels of metal, but it should facilitate high levels of chip integration. (Paper #23.4, "A Versatile 0.13µm CMOS Platform Technology Supporting High Performance and Low Power Applications," A. Perera et al, Motorola)

Transistors are made from layers of different materials printed on a substrate. With silicon- or III-V-based devices, expensive capital equipment is needed to perform the various fabrication steps; gases, acids and other raw materials used in production and in the final product are expensive and may pose environmental concerns; and materials-engineering challenges are high. On the other hand organic, or polymer-based, circuits are made at low temperatures, meaning they can be deposited on inexpensive plastic substrates. They can be much less costly and easier to make than traditional devices. They are of special interest in applications where physical flexibility or low-cost, large-surface-area circuits are required, such as active-matrix displays, sensor arrays, smart cards, and price/inventory tags, or where one-time use is the goal. 

• Fast And Flexible: While organic thin-film transistors (OTFTs) have made tremendous progress in recent years, it has come about on rigid, expensive substrates like glass. A team from Penn State, however, will describe the fastest organic circuits ever made on flexible polymeric substrates, with performance comparable to OTFTs on rigid substrates. They used 75µm-thick transparent, colorless polyethylene naphthalate film (PEN) as the flexible substrate and hydrocarbon pentacene as the active semiconductor material. They built transistor arrays, inverters, ring oscillators, frequency dividers and differential amplifiers with good electrical performance, yield and uniformity. For example, the ring oscillators had a propagation delay of less than 40 µsec per stage. (Paper #25.4, "Fast Organic Circuits on Flexible Polymeric Substrates," C. Sheraw et al, Pennsylvania State University)
• Plastic Transistors, Printed By Ink-Jet: A team from Cambridge University will describe how they made all-polymer thin-film transistors using a high-resolution ink-jet printer, the first time that has been accomplished. Ink-jet techniques have been used to fabricate polymer light-emitting displays and large, flexible displays, but they haven't been adequate for printing small transistors. The Cambridge team, though, used a special piezoelectric ink-jet printhead to fabricate transistors with a channel length of 5µm and a patterned gate electrode. The devices exhibited on/off current ratios exceeding 10⁵ and electron mobilities of 0.02 cm²/Vs, which are adequate for many electronics applications. (Paper #25.5, "All-Polymer Thin Film Transistors Fabricated by High-Resolution Ink-Jet Printing," T. Kawase et al, Cambridge University)